You should never quote anything because of make. Make doesn’t understand or parse single- or double-quote characters in any way. Every quoting character you write in a makefile will be kept as a literal quote and passed along as-is to the commands that make invokes. So, if the shell expects and can interpret a quoted … Read more
You should be able to use the MAKEFILE_LIST variable, like this: # This must be the first line in Makefile.common TOP := $(dir $(firstword $(MAKEFILE_LIST))) From the documentation: As make reads various makefiles, including any obtained from the MAKEFILES variable, the command line, the default files, or from include directives, their names will be automatically … Read more
I also encounter the tar messages “changed as we read it”. For me these message occurred when I was making tar file of Linux file system in bitbake build environment. This error was sporadic. For me this was not due to creating tar file from the same directory. I am assuming there is actually some … Read more
The implicit make rule for compiling a C program is %.o:%.c $(CC) $(CPPFLAGS) $(CFLAGS) -c -o $@ $< where the $() syntax expands the variables. As both CPPFLAGS and CFLAGS are used in the compiler call, which you use to define include paths is a matter of personal taste. For instance if foo.c is a … Read more
make takes a makefile as input. Makefile usually is named makefile or Makefile. The configure command should generate a makefile, so that make could be in turn executed. Check if a makefile has been generated under your working directory.
It’s strange to see so many people using shell scripting for this. I was looking for a way to use native makefile syntax, because I’m writing this outside of any target. You can use the wildcard function to check if file exists: ifeq ($(UNAME),Darwin) SHELL := /opt/local/bin/bash OS_X := true else ifneq (,$(wildcard /etc/redhat-release)) OS_RHEL … Read more
You can use Target-specific Variable Values. Example: CXXFLAGS = -g3 -gdwarf2 CCFLAGS = -g3 -gdwarf2 all: executable debug: CXXFLAGS += -DDEBUG -g debug: CCFLAGS += -DDEBUG -g debug: executable executable: CommandParser.tab.o CommandParser.yy.o Command.o $(CXX) -o output CommandParser.yy.o CommandParser.tab.o Command.o -lfl CommandParser.yy.o: CommandParser.l flex -o CommandParser.yy.c CommandParser.l $(CC) -c CommandParser.yy.c Remember to use $(CXX) or $(CC) … Read more
The shell function. You can use shell function: current_dir = $(shell pwd). Or shell in combination with notdir, if you need not absolute path: current_dir = $(notdir $(shell pwd)). Update. Given solution only works when you are running make from the Makefile’s current directory. As @Flimm noted: Note that this returns the current working directory, … Read more
Makefile.am is a programmer-defined file and is used by automake to generate the Makefile.in file (the .am stands for automake). The configure script typically seen in source tarballs will use the Makefile.in to generate a Makefile. The configure script itself is generated from a programmer-defined file named either configure.ac or configure.in (deprecated). I prefer .ac … Read more
This should do it: SOURCES = $(wildcard *.cpp) $(wildcard */*.cpp) If you change you mind and want a recursive solution (i.e. to any depth), it can be done but it involves some of the more powerful Make functions. You know, the ones that allow you to do things you really shouldn’t. EDIT: Jack Kelly points … Read more