ldr r0,=something … something: means load the address of the label something into the register r0. The assembler then adds a word somewhere in reach of the ldr instruction and replaces it with a ldr r0,[pc,#offset] instruction So this shortcut ldr r0,=0x12345678 means load 0x12345678 into r0. being mostly fixed length instructions, you cant load … Read more
asm volatile(“” ::: “memory”); creates a compiler level memory barrier forcing optimizer to not re-order memory accesses across the barrier. For example, if you need to access some address in a specific order (probably because that memory area is actually backed by a different device rather than a memory) you need to be able tell … Read more
ARM calls FIQ the fast interrupt, with the implication that IRQ is normal priority. In any real system, there will be many more sources of interrupts than just two devices and there will therefore be some external hardware interrupt controller which allows masking, prioritization etc. of these multiple sources and which drives the interrupt request … Read more
Depends on what your native code does, but v7a has support for hardware floating point operations, which makes a huge difference. armeabi will work fine on all devices, but will be a lot slower, and won’t take advantage of newer devices’ CPU capabilities. Do take some benchmarks for your particular application, but removing the armeabi-v7a … Read more
tl;dr – We switch modes to supervisor and use that stack. You are missing the key point of where control is handed to the CPU via the vector table and the mode is switched. See: entry-armv.S and __vectors_start. The vector stubs is the code where control is initially sent after the branch in the main … Read more
It is a trick/shortcut. say for example ldr r0,=main what would happen is the assembler would allocate a data word, near the instruction but outside the instruction path ldr r0,main_addr … b somewhere main_addr: .data main Now expand that trick to constants/immediates, esp those that cannot fit into a move immediate instruction: top: add r1,r2,r3 … Read more
Your target triplet indicates that your compiler is configured for the hard-float ABI. This means that the libgcc library will also be hardfp. The error message indicates that at least part of your system is using soft-float ABI. If the compiler has multilib enabled (you can tell with -print-multi-lib) then you can use -mfloat-abi=softfp, but … Read more
This happens when compiling a file with arm-none-eabi-gcc in one machine/architecture to load it in an ARM target machine. Most probably you are not making use of semihosting, you want to retarget. ARM® Compiler toolchain Version 4.1 indicates: Semihosting is a mechanism that enables code running on an ARM target to communicate and use the … Read more
Can _start be a thumb function (in a Linux user program)? Yes it can. The steps are not as simple as you may believe. Please use the .code 16 as described by others. Also look at ARM Script predicate; my answer shows how to detect a thumb binary. The entry symbol must have the traditional … Read more
I figured it out and I’ll answer it here in case anybody else finds this question. Go to Tools -> Android -> AVD Manager Click “Create Virtual Device” Select which device you want to use from the list (i.e Nexus 5) and click “Next”. Here you’re given a list of android release versions. Look at … Read more